NVMe Verification IP
Host and controller models over PCIe: admin and I/O queues, command sets including zoned and key-value, namespaces and interrupts.
NVMe verification IP
NVMe is the command interface of solid-state drives on PCIe. Its paired submission and completion queues let a drive serve many CPU cores in parallel with very little overhead.
Lumina VIP for NVMe covers NVMe 1.4 · 2.0 · 2.1 · 2.2 · 2.3, as published by NVM Express. It comes as verification IP, built for Lumina, so the same components run in simulation and report their results in one place.
What the NVMe VIP covers.
Queues and commands
- Admin and I/O submission and completion queues with doorbells
- PRP lists and scatter-gather lists
- NVM, zoned namespace and key-value command sets
- Namespaces, reservations and asynchronous events
Controller behaviour
- Controller initialisation, reset and shutdown
- MSI and MSI-X interrupts and coalescing
- Power states, firmware download and commit, and sanitize
- Error and status codes checked on every completion
What it checks
- Command and queue handling
- Data transfer and integrity
- Initialisation, power and speed modes
- Error handling and recovery
Verification IP capabilities
- Active and passive agents for every protocol role, set per instance
- Bus widths, timing and optional features set by parameters, and changeable while a test runs
- A sequence library from basic directed traffic to constrained-random stress
- Error injection, static or on the fly, with checks that the expected error was seen
- Protocol checks that run in real time, each tied to a rule of the specification
- Scoreboards that check data end to end
- Throughput, latency and utilisation statistics for each interface
- Callbacks at each stage for your own checks and stimulus
- UVM register model adapters for protocols that carry register access
- Transaction logs and messages linked to the waveform for debug
Why Lumina VIP.
- Fast NVMe testbench bring-up: connect the agents, pick a test and run
- Every failure names the rule it broke and the transaction that broke it
- Protocol coverage merges with your design coverage in one database
- Readable SystemVerilog and UVM source your team can extend
- Runs natively in Lumina Sim, with no wrappers and no separate compile
- Results structured for engineers and AI agents alike
Verification components.
Each component works on its own or together with the others in one environment, in active or passive mode.
- 01Host driver model
- 02Controller (device) model
- 03Passive monitor
NVMe products.
NVMe verification IP
UVM agents that drive and check a protocol in simulation, in every role the protocol defines.
Includes
- Active and passive UVM agents for each protocol role
- Configurable sequences, from directed to constrained-random
- Protocol checks that flag violations with a spec reference
- Functional coverage of the protocol's features
- Scoreboards and transaction logs readable by people and AI agents
Test suite and coverage.
- Directed tests for each feature of the specification
- Constrained-random tests across configurations and traffic mixes
- Error-injection tests that check how the design recovers
- A functional coverage model mapped to the specification
- Regression lists ready to run in Lumina
Test focus for this protocol family
- Initialisation and every command class
- Queued commands at queue-depth limits
- Power-mode changes under traffic
- Command, data and link errors
What you receive.
- Readable source of every component
- The test suite and its coverage model
- An example environment connected to a sample design
- User guide, integration guide and release notes
- Scripts to run the examples in Lumina
Where it is used.
- SSD controllers
- Computational storage
- Host bus adapters and storage SoCs
Frequently asked questions.
What is Lumina VIP for NVMe?
Lumina VIP for NVMe is a set of verification products for designs that use NVMe: verification IP. Host and controller models over PCIe: admin and I/O queues, command sets including zoned and key-value, namespaces and interrupts.
Which NVMe versions does it support?
NVMe 1.4 · 2.0 · 2.1 · 2.2 · 2.3, as published by NVM Express. If you need another version or option, tell us which one.
Which verification components are included?
Host driver model, Controller (device) model and Passive monitor. Each one can be used on its own or together with the others in one environment.
What language and methodology does it use?
The verification IP and models are written in SystemVerilog with UVM, as readable source your team can extend.
How does it work with Lumina?
It runs in Lumina Sim beside your RTL. Protocol coverage merges into the same database as your own coverage, and every violation names the rule it broke and the transaction that broke it.
Which tests come with it?
Directed tests for each feature of the specification. Constrained-random tests across configurations and traffic mixes. Error-injection tests that check how the design recovers. A functional coverage model mapped to the specification. Regression lists ready to run in Lumina. For this protocol family the tests focus on: initialisation and every command class, queued commands at queue-depth limits, power-mode changes under traffic and command, data and link errors.
What is delivered?
Readable source of every component. The test suite and its coverage model. An example environment connected to a sample design. User guide, integration guide and release notes. Scripts to run the examples in Lumina.
How can I get Lumina VIP for NVMe?
Lumina VIP for NVMe is in preview. Email hello@lumeeslab.com with the versions and product types you need.
Need VIP for a protocol?
Tell us which protocols and versions you need. We also add protocols on request.
Lumina VIP
hello@lumeeslab.comHelpful to include
- The protocols and versions
- Product types: VIP, assertion IP, memory model, transactor
- Your schedule