Ethernet and networking verification IP.
Lumina VIP for 24 protocols in Ethernet and networking: verification IP, assertion IP, memory models and synthesizable transactors, built for Lumina. Ethernet from 10 Mb/s to 1.6 Tb/s, TSN, security and fronthaul.
Ethernet 10M to 1G
MII · RMII · SMII · GMII · RGMII · SGMII · TBI
MAC and PHY side models for 10 Mb/s to 1 Gb/s: the media-independent interfaces, 8b/10b PCS, auto-negotiation and frame checks.
VIPTransactorEthernet BASE-T
10/100/1000BASE-T · 2.5G and 5GBASE-T
Twisted-pair PHY behaviour: auto-negotiation, energy-efficient Ethernet and the 2.5G and 5G BASE-T rates.
VIPEthernet 10G
XGMII · XAUI · 10GBASE-R, KR, KX4 · WIS
10 Gb/s MAC and PCS: XGMII and XAUI, 64b/66b coding, backplane training, FEC and the WAN interface sublayer.
VIPTransactorEthernet 25G and 50G
25GBASE-R, KR · 50GBASE-R, KR, KR2
25 and 50 Gb/s links with Reed-Solomon and BASE-R FEC, PAM4 single lanes and link training.
VIPTransactorEthernet 40G and 100G
XLGMII · CGMII · KR4, CR4, SR4, LR4 · KR10
Multi-lane 40 and 100 Gb/s PCS with lane alignment markers, multi-lane distribution and RS-FEC.
VIPTransactorEthernet 200G and 400G
200GBASE-KR2, KR4, KR8 · 400GBASE-KR4, KR8, KR16
200 and 400 Gb/s MAC and PCS with RS(544,514) FEC, PAM4 lanes and flexible lane counts.
VIPTransactorEthernet 800G
800GBASE-R
800 Gb/s MAC and PCS on 100 Gb/s lanes with the FEC and lane structure of 800G Ethernet.
VIPEthernet 1.6T
1.6TBASE-R (draft)
1.6 Tb/s Ethernet on 200 Gb/s lanes, tracking the IEEE 802.3dj work.
VIPUltra Ethernet
UEC 1.0
Ethernet transport for AI and HPC clusters: packet delivery sublayer, congestion control, semantic sublayer and link-level retry.
VIPTime-Sensitive Networking
Qbv · Qbu and 802.3br · Qav · Qci · Qbb PFC · CB · AVB
Deterministic Ethernet: time-aware shaping, frame preemption, credit-based shaping, per-stream filtering, redundancy and queue and forward behaviour.
VIPPTP and gPTP
IEEE 1588-2019 · 802.1AS-2020
Precision time protocol masters and slaves: sync and follow-up messages, peer delay, timestamps and best master clock selection.
VIPMACsec
802.1AE · GCM-AES-128/256 · XPN
Link-layer security: secure channels and associations, GCM-AES encryption and integrity, replay protection and extended packet numbering.
VIPIPsec
ESP · AH · tunnel and transport
IP security packet processing: ESP and AH, tunnel and transport modes, security associations and anti-replay.
VIPTCP/IP
IPv4 · IPv6 · TCP · UDP
Traffic and checking for TCP/IP offload engines: connection setup and teardown, segmentation, retransmission and checksums.
VIPRoCE
RoCE v1 · v2
RDMA over Converged Ethernet: queue pairs, RDMA reads, writes and sends, acknowledgements and congestion notification.
VIPInterlaken
Interlaken 1.2 · Look-Aside
Chip-to-chip packet interface: bursts and channels, in-band flow control, 64b/67b framing and lane striping.
VIPTransactorRapidIO
RapidIO 2.x · 3.x · 4.x
Serial RapidIO endpoints and switches: logical, transport and physical layers, doorbells, messages and maintenance packets.
VIPTransactorCPRI
CPRI 7.0
Radio equipment control and radio equipment links: hyperframes, IQ data, control and management channels and line rates.
VIPTransactoreCPRI
eCPRI 2.0
Packet-based fronthaul over Ethernet or IP: message types, real-time control and remote memory access.
VIPO-RAN fronthaul
Control, user and synchronisation planes
Open RAN fronthaul between distributed and radio units: C-plane and U-plane messages, sections and compression.
VIPOBSAI
RP3 · RP3-01
Open Base Station Architecture reference point 3 links: message frames, line rates and synchronisation.
VIPTransactorRadio over Ethernet
IEEE 1914.3
Encapsulation of radio data over Ethernet: structure-agnostic and structure-aware mappers and control packets.
VIPG.999.1
G.999.1
The interface between link and PHY layers in multi-line DSL equipment: framing and stream identification.
VIPEtherCAT
IEC 61158 type 12
Industrial Ethernet with on-the-fly processing: datagrams, distributed clocks and mailbox protocols.
Transactor
Browse by category
- 16
On-chip interconnect
AMBA, TileLink, OCP and other buses inside a chip.
- 15
PCIe, CXL and chiplets
PCI Express, CXL, UCIe and other high-speed links.
- 10
USB
USB 2.0 to USB4, Power Delivery and Type-C.
- 26
DRAM
DDR, LPDDR, GDDR and HBM devices, modules and DFI.
- 16
Flash, SRAM and other memory
NAND, NOR, SRAM, PSRAM and non-volatile memories.
- 9
Storage
NVMe, UFS, eMMC, SD, SATA and SAS.
- 24
Ethernet and networking
Ethernet from 10 Mb/s to 1.6 Tb/s, TSN, security and fronthaul.
- 22
MIPI
Camera, display, PHY, control and debug interfaces.
- 14
Display and video
DisplayPort, HDMI, HDCP, SDI and camera links.
- 13
Automotive
CAN, LIN, FlexRay, SENT and automotive Ethernet and SerDes.
- 11
Aerospace and defence
ARINC, MIL-STD-1553, SpaceWire and SpaceFibre.
- 28
Serial and peripheral
I2C, SPI, UART, JTAG, SMBus, PMBus and more.
- 4
Audio
I2S, TDM, PDM and S/PDIF.
- 4
Processor and coding
RISC-V cores and interrupt controllers, floating point and line coding.
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Lumina VIP
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