Processor and coding verification IP.
Lumina VIP for 4 protocols in Processor and coding: verification IP, assertion IP, memory models and synthesizable transactors, built for Lumina. RISC-V cores and interrupt controllers, floating point and line coding.
RISC-V core
RV32 · RV64 · standard extensions
Core verification against an instruction-set reference model: random instruction streams, trace comparison, interrupts and exceptions.
VIPRISC-V PLIC
PLIC 1.0
Platform-level interrupt controller: priorities, thresholds, claim and complete, and per-hart contexts.
VIPFloating-point unit
IEEE 754-2019 · half, single, double
Floating-point operations checked against a reference: rounding modes, exceptions, subnormals, NaN handling and fused multiply-add.
VIPLine coding
8b/10b · 64b/66b · 128b/130b · 128b/132b
Encoders and decoders for serial links: disparity, control symbols, block sync, scrambling and error injection.
VIP
Browse by category
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On-chip interconnect
AMBA, TileLink, OCP and other buses inside a chip.
- 15
PCIe, CXL and chiplets
PCI Express, CXL, UCIe and other high-speed links.
- 10
USB
USB 2.0 to USB4, Power Delivery and Type-C.
- 26
DRAM
DDR, LPDDR, GDDR and HBM devices, modules and DFI.
- 16
Flash, SRAM and other memory
NAND, NOR, SRAM, PSRAM and non-volatile memories.
- 9
Storage
NVMe, UFS, eMMC, SD, SATA and SAS.
- 24
Ethernet and networking
Ethernet from 10 Mb/s to 1.6 Tb/s, TSN, security and fronthaul.
- 22
MIPI
Camera, display, PHY, control and debug interfaces.
- 14
Display and video
DisplayPort, HDMI, HDCP, SDI and camera links.
- 13
Automotive
CAN, LIN, FlexRay, SENT and automotive Ethernet and SerDes.
- 11
Aerospace and defence
ARINC, MIL-STD-1553, SpaceWire and SpaceFibre.
- 28
Serial and peripheral
I2C, SPI, UART, JTAG, SMBus, PMBus and more.
- 4
Audio
I2S, TDM, PDM and S/PDIF.
- 4
Processor and coding
RISC-V cores and interrupt controllers, floating point and line coding.
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