Compute Express Link Verification IP
Host and device models for CXL.io, CXL.cache and CXL.mem on the PCIe physical layer: type 1, 2 and 3 devices, 68B and 256B flits, back-invalidation and memory pooling.
Compute Express Link verification IP
Compute Express Link runs on the PCIe physical layer and adds cache-coherent and memory protocols. It lets processors share memory with accelerators and attach expansion and pooled memory with low latency.
Lumina VIP for Compute Express Link covers CXL 1.1 · 2.0 · 3.x · 4.0, as published by CXL Consortium. It comes as verification IP, built for Lumina, so the same components run in simulation and report their results in one place.
What the Compute Express Link VIP covers.
Protocols
- CXL.io built on PCIe transactions and configuration
- CXL.cache requests, snoops and responses between device and host
- CXL.mem reads and writes, metadata and back-invalidation
- Type 1, type 2 and type 3 devices
Link and fabric
- 68-byte and 256-byte flits, latency-optimised flits and the ARB/MUX
- Integrity and data encryption (IDE)
- Multi-logical devices, memory pooling and port-based routing
- Error handling, viral and poison
What it checks
- Link training and the state machines of every layer
- Transaction ordering, flow control credits and replay
- Configuration space, capabilities and error reporting
- Power states and speed and width changes
Verification IP capabilities
- Active and passive agents for every protocol role, set per instance
- Bus widths, timing and optional features set by parameters, and changeable while a test runs
- A sequence library from basic directed traffic to constrained-random stress
- Error injection, static or on the fly, with checks that the expected error was seen
- Protocol checks that run in real time, each tied to a rule of the specification
- Scoreboards that check data end to end
- Throughput, latency and utilisation statistics for each interface
- Callbacks at each stage for your own checks and stimulus
- UVM register model adapters for protocols that carry register access
- Transaction logs and messages linked to the waveform for debug
Why Lumina VIP.
- Fast Compute Express Link testbench bring-up: connect the agents, pick a test and run
- Every failure names the rule it broke and the transaction that broke it
- Protocol coverage merges with your design coverage in one database
- Readable SystemVerilog and UVM source your team can extend
- Runs natively in Lumina Sim, with no wrappers and no separate compile
- Results structured for engineers and AI agents alike
Verification components.
Each component works on its own or together with the others in one environment, in active or passive mode.
- 01Host
- 02Device (type 1, 2, 3)
- 03Passive monitor
Compute Express Link products.
Compute Express Link verification IP
UVM agents that drive and check a protocol in simulation, in every role the protocol defines.
Includes
- Active and passive UVM agents for each protocol role
- Configurable sequences, from directed to constrained-random
- Protocol checks that flag violations with a spec reference
- Functional coverage of the protocol's features
- Scoreboards and transaction logs readable by people and AI agents
Test suite and coverage.
- Directed tests for each feature of the specification
- Constrained-random tests across configurations and traffic mixes
- Error-injection tests that check how the design recovers
- A functional coverage model mapped to the specification
- Regression lists ready to run in Lumina
Test focus for this protocol family
- Link training at every rate and width
- Flow-control credit exhaustion and replay
- Malformed TLPs, LCRC and ECRC errors
- Power-state entry and exit under traffic
What you receive.
- Readable source of every component
- The test suite and its coverage model
- An example environment connected to a sample design
- User guide, integration guide and release notes
- Scripts to run the examples in Lumina
Where it is used.
- Memory expansion and pooling
- Coherent accelerators
- Data-centre servers
Frequently asked questions.
What is Lumina VIP for Compute Express Link?
Lumina VIP for Compute Express Link is a set of verification products for designs that use Compute Express Link: verification IP. Host and device models for CXL.io, CXL.cache and CXL.mem on the PCIe physical layer: type 1, 2 and 3 devices, 68B and 256B flits, back-invalidation and memory pooling.
Which Compute Express Link versions does it support?
CXL 1.1 · 2.0 · 3.x · 4.0, as published by CXL Consortium. If you need another version or option, tell us which one.
Which verification components are included?
Host, Device (type 1, 2, 3) and Passive monitor. Each one can be used on its own or together with the others in one environment.
What language and methodology does it use?
The verification IP and models are written in SystemVerilog with UVM, as readable source your team can extend.
How does it work with Lumina?
It runs in Lumina Sim beside your RTL. Protocol coverage merges into the same database as your own coverage, and every violation names the rule it broke and the transaction that broke it.
Which tests come with it?
Directed tests for each feature of the specification. Constrained-random tests across configurations and traffic mixes. Error-injection tests that check how the design recovers. A functional coverage model mapped to the specification. Regression lists ready to run in Lumina. For this protocol family the tests focus on: link training at every rate and width, flow-control credit exhaustion and replay, malformed TLPs, LCRC and ECRC errors and power-state entry and exit under traffic.
What is delivered?
Readable source of every component. The test suite and its coverage model. An example environment connected to a sample design. User guide, integration guide and release notes. Scripts to run the examples in Lumina.
How can I get Lumina VIP for Compute Express Link?
Lumina VIP for Compute Express Link is in preview. Email hello@lumeeslab.com with the versions and product types you need.
Need VIP for a protocol?
Tell us which protocols and versions you need. We also add protocols on request.
Lumina VIP
hello@lumeeslab.comHelpful to include
- The protocols and versions
- Product types: VIP, assertion IP, memory model, transactor
- Your schedule